Keysight Technologies 3458A Guide D'utilisation page 453

Optimizing Throughout and Reading Rate D
Figure D-6 Shows benchmark execution times for different configurations
The measurement sequence demands that the resistance values be checked
before the circuit is powered. Then, the powerline voltage is checked for proper
level. The output level 1 V at 5 kHz is checked to limits of ±.075%. Finally, the
remaining voltages are checked in the following sequence:
2 DCV <10 V ±1%
1 DCV <10 V ±.01%
2 DCV <10 V ±1%
1 DCV <1 V ±.001%
1 ACV <10 V ±.1%
1 DCV <10 V ±1%
3 DCV <10 V ±.01%
Keysight 3458A User's Guide 453