Product Configuration Data Frames - ADEUNIS WMBUS DRY CONTACTS Guide Utilisateur

WMBUS DRY CONTACTS - Guide utilisateur / User guide version V2.0.0
4.2.1.02 Status Byte
The status byte is broken down in the following way:
Alarm Status Bit 7
No Error
Low bat
HW Error
Details of the fields:
• Frame counter: Frame counter, it increments at each transmission and allows the user to see quickly if a frame has been lost. It counts from
0 to 7 before looping back.
• HW: This bit is set to 1 when a hardware error has occurred, for example a writing problem in the EEPROM, a reading problem on the ADC,
etc. The product must be returned to the service dept.
• Low Bat: bit at 1 if the battery voltage is less than 2.5V, otherwise 0. This information remains permanent.
E.g.:
A value of the status byte equal to 0xA2 (= 10100010 in binary) gives:
• Bit 7 at 5 = 101 = 0x05 i.e. a frame counter at 5
• Bit 4 at 0 = 00010 in binary i.e. a low battery alarm

4.2.2 Product configuration data frames

Following reception of a downlink frame with the code 0x10 or on switching to the operating mode (from the Park or Command Mode), the
next frames (0x10) representing the application configuration of the product are transmitted:
0 1
Code Status
0x10 Cf Status S300
0x10 0xA2 0x90
Description of the frame:
• Byte 2: register 300, periodicity of the Keep Alive frame, expressed in tens of minutes
• Byte 3: register 301, periodicity of transmission (periodic mode), expressed in tens of minutes
• Byte 4: register 320, configuration of input TOR1
• Byte 5: register 321, configuration of input TOR2
• Byte 6: register 322, configuration of input TOR3
• Byte 7: register 323, configuration of input TOR4
• Byte 8: register 306, product mode (Park, Standard (production), Test or REPLI)
In the example in grey this gives:
• Byte 2=0x90: register 300, Keep Alive frame transmitted every 12 hours
• Byte 3=0x48: register 301, periodical transmissions are made every 0x48=72 in decimal x 10 minutes = 720 minutes i.e. every 12 hours
• Byte 4=0x73: register 320:
• TOR1 configured in periodic mode
• Counting of high and low edges
• Waiting period of 1 second
• Byte 5=0x00: register 321:
• TOR2 disabled
• No waiting period
Bit 6 Bit 5
Frame Counter
0x00 to 0x07
2 3 4
S301 S320
0x48 0x73
Bit 4 Bit 3
Reserved Reserved
X X
X X
X X
5 6 7
PAYLOAD
S321 S322 S323
0x00 0xB4 0x32
Bit 2 Bit 1 Bit 0
HW Low Bat Reserved
0 0
0 1
1 0
8 9
S306 X
0x01
0
FR
0
0
EN
10
X
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