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CDX-GT57UPW/GT62UMI/GT570UE/GT570UI/GT570UP/GT574UI/GT620UI/GT626UI
MAIN BOARD IC601 TMPM320C1DFG-9999 (SUB SYSTEM CONTROLLER)
Pin No.
Pin Name
1
MODE1
2
RESETn
3
DRV_ON
4
BSIF_INT
5
DEC_INT
6
(DOOR_SW)
7
MEC_LIMIT
8
CD_XRST
9
DEC_XMUTE
10
SF_WP
11
SF_HOLD
12
DVCC3.3IO
13
DVSSCOM
14
SP_CLK
15
SP_DATA
16
CD_ZDET
17
A-ATT
18
SF_SO
19
SF_SI
20
SF_CE
21
SF_CLK
22
BSIF_DATA
23
BSIF_GATE
24
BSIF_LRCK
25
BSIF_BCK
26
LCD_DO
27
ILL_IN
28
LCD_CE
29
LCD_CLK
30
DVCC3.3IO
31
DVSSCOM
32
DVCC1.2DRM
33
DVCC1.2DRM
34
DVSSCOM
35
SWDCK
36
SWDIO
CD_BUS0 to
37 to 40
CD_BUS3
41
CD_BUCK
42
DVCC33IO
43
DVCC3.3DRM
44
DVSSCOM
45
CD_XCCE
46
USB_EN
47
CP_SEL
48
DVCC1.2
49
BT_TX
50
BT_RX
51
BT_CTS
52
BT_RTS
53
DVSS_COM
54
BT_POWER
55
BT_RESET
56
BT_MIC_DET
57
CP_RESET
58
MC_TX
59
MC_RX
60
I2C_SCL
42
I/O
I
Operation mode setting terminal
I
Reset signal input terminal from the main system controller
O
Driver control signal output to the CD section
I
Request signal input from the audio DSP
I
Request signal input from the audio DSP
-
Not used
I
Detection signal input from the CD section (limit switch)
O
Reset request signal output to the main system controller
O
Muting on/off control signal output to the audio DSP
O
Write protect signal output to the serial fl ash
O
Hold signal output to the serial fl ash
-
Power supply terminal (+3.3V)
-
Ground terminal
O
Spectrum analyzer data transfer clock signal output to the audio DSP
I
Spectrum analyzer data input from the audio DSP
I
Zero detection signal input from the audio DSP
O
Muting on/off control signal output to the main system controller
O
Serial data output to the serial fl ash
I
Serial data input from the serial fl ash
O
Chip enable signal output to the serial fl ash
O
Serial data transfer clock signal output to the serial fl ash
O
Audio data output to the audio DSP
O
Gate signal output to the audio DSP
O
L/R sampling clock signal output to the audio DSP
O
Bit clock signal output to the audio DSP
O
Serial data output to the liquid crystal display driver
I
Illuminate line detect signal input terminal
O
Chip enable signal output to the liquid crystal display driver
O
Serial data transfer clock signal output to the liquid crystal display driver
-
Power supply terminal (+3.3V)
-
Ground terminal
-
Power supply terminal (+1.2V)
-
Power supply terminal (+1.2V)
-
Ground terminal
O
Debug terminal (for ICE)
I/O
Debug terminal (for ICE)
O
Serial data output to the audio DSP
O
Serial data transfer clock signal output to the audio DSP
-
Power supply terminal (+3.3V)
-
Power supply terminal (+3.3V)
-
Ground terminal
O
Chip enable signal output to the audio DSP
-
Not used
I
EEPROM setting terminal
-
Power supply terminal (+1.2V)
O
Serial transmit data output terminal
I
Serial receive data input terminal
I
Serial receive data input terminal
O
Serial transmit data output terminal
-
Ground terminal
O
Power on/off control signal output terminal
O
Reset signal output terminal
I
Microphone detection signal input terminal
O
Reset signal output to the EEPROM
O
Serial data output to the main system controller
I
Serial data input from the main system controller
O
Serial data transfer clock signal output to the EEPROM
Description
Fixed at "L" in this unit
Not used
Not used
Not used
"H": EEPROM use
Not used
Not used
Not used
Not used
Not used
Not used
Not used
"L": reset
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