Sony Bravia KDL-52Z5500 Mode D'emploi page 105

Block Diagram
Diagrammi a blocchi
MS (JIG)
PHY
Ether
USB
NICAM/A2
Aerial/Cable
Tuner
TMDS
HDMI
DDC
HDMI1
CEC
EQ/SW
TMDS
DDC
HDMI2
CEC
TMDS
DDC
HDMI3
CEC
TMDS
DDC
HDMI4
CEC
L/R
DVI/PC in
RGB/HV
PC In
CVBS
RGB
L/R
SCART/V1
CVBS (TVOUT)
L/R (TVOUT)
CVBS/YC
RGB
L/R
SCART/V2
CVBS (SELOUT)
L/R (SELOUT)
YCbCr
Comp1
L/R
L/R
Audio Out
SPDIF
Opt. Out
HP Out
YCbCr
Side Video
L/R
NAND
512Mbx2
TS
TS
IIC_SINK
IIC0
(Video decoder)
(Sound decoder)
(Backend control)
Sub Chrom
Video SW
IIC2
IIC1
SPDIF
Audio
I2S 5.1ch
DSP
L/R
DAC
Audio
Pre Amp
Audio
Amp
DDR2 DDR2
1Gb 512Mb
LVDS(60/50Hz)
One chip
(Main micro)
UART
Sub micro
Temp
NVM
Sensor
Panel
240/200Hz
BA
PE-L
Panel
120/100Hz
Panel
60/50Hz FHD
Panel
60/50Hz WXGA
Power SW
Key
IR
LED
PE-L
PE-L
Power Supply
Gx/IPx
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