Internal Ic Diagram - Hitachi HTD-K160 Manuel D'entretien

C F745 INTERNAL IC DIAGRAM
9-11
9-11
EPROM/ROM
STACK 1
512 X 12 TO
STACK 2
2048 X12
PC
12
INSTRUCTI O N
REGISTER
WDT TIME
9
12
8
INSTRUCTI O N
DECODER
DIRECT ADDRESS
DIRECT RAM
8
STATUS
W
ALU
FROM W
4
TRIS5
TRISA PORTA
16
T0CKI
CONFIGURATION WORD
PIN
DISABLE OSC
SELEC T
WATCHDOG
2
TIMER
CODE
PROTECT
CLKOUT
WDT/TMR0
OUT
PRESCALER
6
OPTION
OPTION REG.
FROM W
ADDRESS
5
5-7
TMR0 FSR
DATA BUS
8
FROM W
8
4
8
TRIS6
TRIS7
TRISB PORTB
4
8
RA<3:0> RB<7:0>
OSC1 OSC2 MCLR
OSCILLIATOR/
TIMING &
CONTROL
SLEEP
GENERAL
PURPOSE
REGISTER
FILE
(SRAM )
24, 25, 72 or
73 Bytes
8
FROMW
8
8
TRISC
PORTC
8
RC<7:0>
(28-Pin
Devices Only)
16